Static Timing Analysis

Project : project-hackathon
Build Time : 06/04/26 16:25:43
Device : CY8C4247AZI-M485
Temperature : -40C - 85C
VDDA_0 : 3.30
VDDA_CTB : 3.30
VDDD : 3.30
VDDD_0 : 3.30
VDDD_1 : 3.30
VDDIO : 3.30
VDDIO_1 : 3.30
VDDIO_2 : 3.30
VDDIO_A : 3.30
VDDIO_A_1 : 3.30
Voltage : 3.3
Expand All | Collapse All | Show All Paths | Hide All Paths
+ Timing Violation Section
No Timing Violations
+ Clock Summary Section
Clock Domain Nominal Frequency Required Frequency Maximum Frequency Violation
Clock_1(FFB) Clock_1(FFB) 1.000 MHz 1.000 MHz N/A
CyHFClk CyHFClk 48.000 MHz 48.000 MHz N/A
I2C_1_SCBCLK CyHFClk 1.600 MHz 1.600 MHz N/A
I2C_Slave_SCBCLK CyHFClk 1.600 MHz 1.600 MHz N/A
Clock_1 CyHFClk 1.000 MHz 1.000 MHz N/A
UART_SCBCLK CyHFClk 1.371 MHz 1.371 MHz N/A
CyILO CyILO 32.000 kHz 32.000 kHz N/A
CyIMO CyIMO 48.000 MHz 48.000 MHz N/A
CyLFClk CyLFClk 32.000 kHz 32.000 kHz N/A
CyRouted1 CyRouted1 48.000 MHz 48.000 MHz N/A
CySysClk CySysClk 48.000 MHz 48.000 MHz N/A
I2C_1_SCBCLK(FFB) I2C_1_SCBCLK(FFB) 1.600 MHz 1.600 MHz N/A
I2C_Slave_SCBCLK(FFB) I2C_Slave_SCBCLK(FFB) 1.600 MHz 1.600 MHz N/A
UART_SCBCLK(FFB) UART_SCBCLK(FFB) 1.371 MHz 1.371 MHz N/A
+ Clock To Output Section
+ Clock_1(FFB)
Source Destination Delay (ns)
\PWM_Rood:cy_m0s8_tcpwm_1\/line LED_A(0)_PAD 20.307
Type Location Fanout Instance/Net Source Dest Delay (ns)
m0s8tcpwmcell F(TCPWM,1) 1 \PWM_Rood:cy_m0s8_tcpwm_1\ \PWM_Rood:cy_m0s8_tcpwm_1\/clock \PWM_Rood:cy_m0s8_tcpwm_1\/line 0.000
Route 1 Net_226 \PWM_Rood:cy_m0s8_tcpwm_1\/line LED_A(0)/pin_input 2.577
iocell28 P3[0] 1 LED_A(0) LED_A(0)/pin_input LED_A(0)/pad_out 17.730
Route 1 LED_A(0)_PAD LED_A(0)/pad_out LED_A(0)_PAD 0.000
Clock Clock path delay 0.000
\PWM_Blauw:cy_m0s8_tcpwm_1\/line LED_B(0)_PAD 19.438
Type Location Fanout Instance/Net Source Dest Delay (ns)
m0s8tcpwmcell F(TCPWM,0) 1 \PWM_Blauw:cy_m0s8_tcpwm_1\ \PWM_Blauw:cy_m0s8_tcpwm_1\/clock \PWM_Blauw:cy_m0s8_tcpwm_1\/line 0.000
Route 1 Net_223 \PWM_Blauw:cy_m0s8_tcpwm_1\/line LED_B(0)/pin_input 2.578
iocell29 P3[1] 1 LED_B(0) LED_B(0)/pin_input LED_B(0)/pad_out 16.860
Route 1 LED_B(0)_PAD LED_B(0)/pad_out LED_B(0)_PAD 0.000
Clock Clock path delay 0.000